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Making a Cassiopi... or Frankenopeia

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astrosynthesist Page Icon Posted 2020-01-07 6:42 AM
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Hello forum! I am new here, honestly came for a download but now since I have read about the community shrinking and I have to join and become an active member, might as well try to be a good member!

I own 3 Casio A11s, and in addition have both CE 1 and 2 for them. I have played with them (and continue to play with them) but I have decided I am going to try something bold, as I love the form factor (mostly), but 4MB RAM and that SH3 crawl is a little drole nowadays. Here is my vision (It has been a vision for 3 years but I want to pick up the project again, maybe there are some people in here who know a bit about A11 hardware):
I love this form factor. I wish computers were made in this form factor today. So I am gutting my ugliest cassiopeia. The goal is to make a modern, albeit simple, computer with the ability to connect to modern wireless networks and act as a terminal for my home server. I want it to have ludicrously long battery life (hence looking at this particular package with a simple reflective lcd).

Plans to achieve this:
In the pcmcia card slot I envision a big fat lipo battery. I can also see reusing the battery bay, but I really want this thing to be like 50% battery. Maybe a dual battery setup. I will be designing a new motherboard that will fit the existing mount points inside the case. At minimum, it will contain a raspberry pi compute module or a raspberry pi zero. It will also contain a wifi chip (Or I will use the pi zero + w).
Stretch goals:
Me being me, I want to continue to have an IR blaster so that I can unsuspiciously mess with random appliances. Ideally, I would have an HDMI output, along with a couple USB interfaces. I am not sure how I would do this. On the one hand, I could go the aesthetically simple route and put a usb type c connector behind the serial/power connector door. This would likely be a monster to implement on the circuit board, but a very elegant (and modern) looking solution. Alternatively, there is ample room for lots of different types of connectors on the pcmcia slot opening side of the computer, so in this case there is no clear answer yet as I am too early to determine how best use available connector space.

The hard part:
Reverse engineering the screen interface and the keyboard interface. I know the keyboard is probably a diode matrix, so it shouldn't be too too hard to figure out how to scan it and interface it with the Pi, but the screen is going to be a whole other ball game. I have only been able to find a service manual for the A20 and I hear that it uses a different screen protocol than the A11. If I have to ditch the touch digitizer, that's fine, but of course ideally I wouldn't want to.

Please, encourage me to pursue this. I hope someone finds this concept cool! Please let me know your thoughts, and most of all, if you have any idea if it is possible to use a standard display output from an RPI with the Casio LCD.

Nice to meet you all!
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Karpour Page Icon Posted 2020-01-07 7:08 PM
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People have done similar things, the most work is reverse engineering everything. The keyboard is less of an issue. Connecting a RasPi to the screen is of course possible, but it'll require quite a bit of work, a scope, a logic analyzer and enough experience to write a custom linux driver. But yes, with enough dedication, it is doable!
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astrosynthesist Page Icon Posted 2020-01-07 8:04 PM
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Awesome, thanks for your reply
I just recently acquired a mixed signal oscilloscope, so that will be a good way to break into the logic analyzer side of things. Do you happen to know any forum members/blog posts/pictures/anything of anyone else who has worked on a similar project, specifically, gutting a hpc and putting a new single board computer in, or at the very least reverse engineering it? Something in there might be a good jumping off point for me.
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Jake Page Icon Posted 2020-01-07 8:26 PM
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Welcome to the forum. We're glad to have you here.

Jake
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Karpour Page Icon Posted 2020-01-07 9:02 PM
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Factorite (Elite)

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Here's something that goes into that direction. https://hackaday.com/2017/11/12/the-vaio-with-a-pi-inside/
That person was able to use an off-the-shelf hdmi board though.
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ict Page Icon Posted 2020-01-08 6:46 PM
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The A-11 seems like a pretty good candidate for a project like this, the board isn't too weirdly shaped and the empty space you'd have if you removed it looks like it would be plentiful for a Zero and anything else you'd need to get the project working plus a battery and cables for I/O routing. I'm not sure how large the serial port opening would be on the side of the case, maybe it's wide enough to fit one micro USB and one micro HDMI?

I've always wanted to do something kind of similar, but rather than rebuilding a dead HPC with new internals I'm curious if you can just throw a tiny SBC like a NanoPi or VoCore into a PC card with one or two serial ports that you can talk to through the native CE terminal application. Power draw might be a bit much, especially for the older CE 1.x machines.
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astrosynthesist Page Icon Posted 2020-01-09 4:45 PM
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ict - 2020-01-09 1:46 PM

I've always wanted to do something kind of similar, but rather than rebuilding a dead HPC with new internals I'm curious if you can just throw a tiny SBC like a NanoPi or VoCore into a PC card with one or two serial ports that you can talk to through the native CE terminal application. Power draw might be a bit much, especially for the older CE 1.x machines.


You, are a genius.

Ever since this comment my mind has been spinning with the possibilities here. I am thinking I will pursue this project first, as it holds potential to be very, very useful for all palmtop pc users. Let me see if I see your vision here:

SBC in pcmcia slot with PCI UART providing one or two serial data connections between SBC and handheld pc.

Allows for:
Modem emulation, configuration for a HPC on an 802.11ac/n network with the SBC acting as a go-between
Mass file storage and backup on the SBC so that backup batteries are relatively obsolete
Shell access to SBC for modern computing tasks on a HPC form factor.
Universally compatible with any system that has a pcmcia slot

The biggest downside to this concept is (to me) that you are still stuck with the slow screen updating on slow processors such as the SH3, but for those who are hobbyists, who cares? For me wanting to actually daily drive something like this I still might need to gut the machine and pursue the original project.
Other downsides:
Battery life might suck with this card added
No graphical interface with modern SBC (except on more powerful HPCs that might have x-window)

I am looking at this chip:
https://www.maxlinear.com/ds/xr17d152_120-061504.pdf

And (probably too good to be true) it appears to have dual-UART RS232 compatibility, and PCI-bus autoconfig without the need of EEPROM on board.
Could it be... a single chip to do all the interfacing we need? Do we really only need that one chip and then a suitably sized SBC to fit inside the slot?

This is much simpler than the reverse engineering concept in theory... I want to prototype this right away.

Please let me know if we share the same vision here, if you see other potentials, or if I'm crazy.
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ntware Page Icon Posted 2020-01-10 8:09 PM
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I had the same idea a while ago. It all started with the thought of using the ESP8266 as a modern WiFi PC Card for the Jornada 720. But then I thought about having a full blown ARM computer connected to the PC Card slot. Through the serial connection, we could use some sort of VNC protocol to access the graphical X environment running in the board. I know that there are some VNC ports to WinCE, but they don’t seem to be very reliable. RPC can be another option as well since there are official Microsoft ports for the CE. If the refresh rate is not good enough, the project can be expanded even further to use the parallel bus on the PC Card slot, instead of an emulated serial connection, to transfer the whole frame buffer (like an external parallel LCD screen). A little application on the CE side can decipher the buffer and display it in full screen
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astrosynthesist Page Icon Posted 2020-01-11 5:42 AM
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ntware - 2020-01-11 3:09 PM

Through the serial connection, we could use some sort of VNC protocol to access the graphical X environment running in the board. I know that there are some VNC ports to WinCE, but they don’t seem to be very reliable. RPC can be another option as well since there are official Microsoft ports for the CE. If the refresh rate is not good enough, the project can be expanded even further to use the parallel bus on the PC Card slot, instead of an emulated serial connection, to transfer the whole frame buffer (like an external parallel LCD screen). A little application on the CE side can decipher the buffer and display it in full screen


With the chip I was talking about above it is conceivable that it can autoconfig as a standard serial point in which case we can use it as a serial modem with the SoC. Thus if VNC/RPC is supported on a platform it can be used via standard TCP/IP. The pcmcia frame buffer idea would probably be difficult to implement - I haven't seen any specific evidence that the VRAM is shared in the standard address space in my devices. I considered that it might be theoretically possible to implement, but I would definitely have to break out my logic analyzer to be sure. To start with I definitely want to try simple TTY access and TCP/IP. From there hopefully the platform is versatile enough to have the community start writing more drivers for new features.
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ntware Page Icon Posted 2020-01-11 1:36 PM
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That’s great! I’m up for helping in this project with whatever is needed. Let’s join forces? Perhaps for an initial prototype, we could have an external case with a powerful SBC + batteries + XR17D152 and a PCMCIA connector at the end, looking like an external PCMCIA hard disk.

On the Linux side, we can configure PPPd to have a TCP/IP connection over the serial port. On the WinCE side, it will look like a normal PPP modem connection to the internet. Then we will be able to access internet from the CE (SBC acting like a proxy) and also access the underlying Linux on the SBC itself through telnet (SSH is impossible on any HPC), VNC or RPC. This will be super cool!

PS: the frame buffer idea I was talking about was not to directly access VRAM. My idea was to create a “framebuffer” driver on the SBC Linux side that would output the screen pixels in a parallel configuration to use all the PCMCIA data pins (this will give high throughput). Then, on the CE side, we write a driver to interface this parallel data coming from the PCMCIA bus and decode it as screen image. A user mode application will also be needed to display the screen contents on the CE. This is kinda like creating our own “VNC” app, but with a much much higher throughput.
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astrosynthesist Page Icon Posted 2020-01-12 3:53 AM
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Sounds good! Firstly, are you a hardware or software guy or both? I am mainly a hardware guy... I don't have any experience writing drivers for CE and I don't have an environment yet for the CE ecosystem. My primary interest is on the CE1.0/CE2.0 platforms. I can do linux though if we happen to need anything there.

I have done some investigating, I wanted to use a raspberry pi compute module inside the theoretical final product, but every SODIMM slot I could find would make the setup too tall to fit inside a pcmcia card. A raspberry pi zero w will however fit with no problems if the big connectors are moved off of it, and could be interfaced with the GPIO header. Alternatively we can work with the open-source OLinuXino platform to make our own customized (more powerful) board with linux support.

I was screwing around with connecting my Casio to my Windows 7 laptop today either by PPP or as a raw serial input device and was having quite the difficulty. I did manage to get the serial terminal working and the redrawing rate was abysmal, but I think this was pretty much what we are used to for the SH3 lol. Some quick off-the-cuff calculations: 240x120 screen, 4-bit greyscale depth, at 115,200 baud it would take exactly 1 second to transfer one frame via serial. Then add the overhead of a couple of clock cycles to transfer the frame to the screen (if we can't write directly to VMEM) and we are looking at over a second delay for a framebuffer implementation. Now, if we can do a difference-based frame rendering system we might be able to get a limited graphical forwarding capability but tbh I am not super hopeful. I imagine that this should probably be our stretch goal. Don't forget that though we have parallel access to the HPC's bus we still have the bottleneck of the serial connection between the SBC and the interface chip. It might be possible to use both serial connections at the same time, for example, to half the time it would take to transfer a frame, but let's cross this one bridge at a time!

Thankfully, no need for a telnet protocol to connect to a linux-based system. A direct serial connection should have no problems being a TTY.

If you want a hand in the hardware design, do you mind if I create the project on the Altium Circuitmaker open source platform?
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ict Page Icon Posted 2020-01-14 7:38 PM
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Thinking out loud a bit, after reading around:


  • The Zero W is a great candidate; it's cheap, fast and readily available, and supposedly operating with no special upfront tweaks it will draw in the neighborhood of 100-160mA which is beyond the 70-100mA limit I believe is imposed by PCMCIA but still well under the PC Card's 660 mA maximum. If you can figure out an effective power management scheme, such a board and a pair of UARTs (~4mA each? and assuming you can't just use what the Pi itself already has) should be easy to power from any newer HPC with a PC Card slot without an external source. Earlier CE 1.0/2.0 devices might still be able to work with an external USB power source, I'm not sure. Some additional setting tweaks such as disabling the LED, anything video-related, etc. might also stand to decrease power draw in a somewhat meaningful way.

  • However...
  • Whatever solution you end up choosing to build around, even more important than operating power draw is the ability to quickly suspend and resume from a low-power state, also one the greatest advantages of CE handhelds themselves. This is, to my knowledge, currently the main caveat of using a Pi, which does not have any support for sleep/deep sleep modes without using external hardware to "emulate" it. Thus, your best option on a Pi is hibernation, which may lack in the performance department, and also apparently requires a custom kernel built to support it. If you can do this, and find a good way to detect the current operating state of the host HPC, you might be able to get by this way, including a small battery backup on the card capable of supplying enough power to allow for a graceful hibernation whenever the host machine is suspended, or the card appears to be idle.

  • It seems that there is a real lack of Linux SBCs that can suspend to RAM. One *possible* option might be Microchip's SAMA5D2 system-on-modules if you can drum up enough interest for that minimum 100-board order. I haven't done much research into these. Some BeagleBoards like the PocketBeagle also seem to support "power management" features which I would assume includes the ability to suspend. There's also the Arietta G25 module, which supports a low-power mode at least going off of the datasheet.

  • Regarding the choice in UARTs, I'm not sure if using a PCI UART is the best option for a PC card, which I believe is more electrically similar to ISA



Please feel free to correct me any of this, I'm definitely not in my element here, just wanted to throw some of this out there in case it might be of interest (and hopefully I'm not repeating anything.) Something like this would be complicated, but incredibly useful for HPCs and a whole host of other systems that are becoming increasingly limited in the mobility department nowadays.

edit: found the PCMCIA/PC Card spec for a better idea of power requirements

Edited by ict 2020-01-14 7:59 PM
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astrosynthesist Page Icon Posted 2020-01-14 9:15 PM
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ict - 2020-01-15 2:38 PM

The Zero W is a great candidate; it's cheap, fast and readily available, and supposedly operating with no special upfront tweaks it will draw in the neighborhood of 100-160mA which is beyond the 70-100mA limit I believe is imposed by PCMCIA but still well under the PC Card's 660 mA maximum. If you can figure out an effective power management scheme, such a board and a pair of UARTs (~4mA each? and assuming you can't just use what the Pi itself already has) should be easy to power from any newer HPC with a PC Card slot without an external source. Earlier CE 1.0/2.0 devices might still be able to work with an external USB power source, I'm not sure. Some additional setting tweaks such as disabling the LED, anything video-related, etc. might also stand to decrease power draw in a somewhat meaningful way.


I hadn't considered the idea of power management... I just assumed that the RPi would be "on" when the device was on and "off" when the device was off, or ejected from the machine etc. You raise a good point however for the prototyping stage I am not quite as worried about that as any SBC should be compatible with a standard UART at 115200 baud these days as long as the GPIO is available at the very least. So I can build the prototypes with a simple expansion connector that provides both serial ports for external access, as well as a RPi-hat-compatible set of pads on the inside so that (at least for now) anyone can solder in a RPi zero as it seems to be the easiest and most attainable solution. Best of both worlds, for prototyping's sake, as far as I can see.

Quote
ict - 2020-01-15 2:38 PM
Whatever solution you end up choosing to build around, even more important than operating power draw is the ability to quickly suspend and resume from a low-power state, also one the greatest advantages of CE handhelds themselves. This is, to my knowledge, currently the main caveat of using a Pi, which does not have any support for sleep/deep sleep modes without using external hardware to "emulate" it. Thus, your best option on a Pi is hibernation, which may lack in the performance department, and also apparently requires a custom kernel built to support it. If you can do this, and find a good way to detect the current operating state of the host HPC, you might be able to get by this way, including a small battery backup on the card capable of supplying enough power to allow for a graceful hibernation whenever the host machine is suspended, or the card appears to be idle.


It seems that there is a real lack of Linux SBCs that can suspend to RAM. One *possible* option might be Microchip's SAMA5D2 system-on-modules if you can drum up enough interest for that minimum 100-board order. I haven't done much research into these. Some BeagleBoards like the PocketBeagle also seem to support "power management" features which I would assume includes the ability to suspend. There's also the Arietta G25 module, which supports a low-power mode at least going off of the datasheet.


I like the idea of having a ramdisk-capable machine in the expansion slot. It just seems poetic... like Russian dolls or Inception. I will be sure to keep the design general enough that people can play with their configuration. Might be best not to have a "baked in" consideration like the OLinuXino I was throwing around. Headers play best with hobbyists.

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ict - 2020-01-15 2:38 PM
Regarding the choice in UARTs, I'm not sure if using a PCI UART is the best option for a PC card, which I believe is more electrically similar to ISA


Seeing as the Casio A10/A11 is a first-generation unit, and it supports modem cards, that means to me we are working in the PCMCIA v2.0 spec, which is 32-bit to the best of my knowledge. So I have full intention of making this design as simple as possible (hopefully taking advantage of that PCI-compatible UART) because...

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ict - 2020-01-15 2:38 PM
Please feel free to correct me any of this, I'm definitely not in my element here, just wanted to throw some of this out there in case it might be of interest (and hopefully I'm not repeating anything.) Something like this would be complicated, but incredibly useful for HPCs and a whole host of other systems that are becoming increasingly limited in the mobility department nowadays.


This is a pretty darn ambitious project for me too! I am a specialist in analog circuits, and digital circuit design is somewhat out of my domain... but I have a working knowledge and I am hoping that < 500 MHz bus speeds will be not too insane for me to dip my toes into. It will be a learning process!
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ict Page Icon Posted 2020-01-14 10:30 PM
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astrosynthesist - 2020-01-14 9:15 PM

however for the prototyping stage I am not quite as worried about that as any SBC should be compatible with a standard UART at 115200 baud these days as long as the GPIO is available at the very least. So I can build the prototypes with a simple expansion connector that provides both serial ports for external access, as well as a RPi-hat-compatible set of pads on the inside so that (at least for now) anyone can solder in a RPi zero as it seems to be the easiest and most attainable solution. Best of both worlds, for prototyping's sake, as far as I can see.


Sounds like a good way to go, it was just something interesting I had come across when I was digging through a little more looking for other possible options. I had not considered power management very much myself and kind of just assumed it was a given on a device like this, but I was surprised by how lacking the Pi lineup is in this department, you'd think the Zero at least would put a little bit more emphasis on those kinds of things.

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astrosynthesist - 2020-01-14 9:15 PM

Seeing as the Casio A10/A11 is a first-generation unit, and it supports modem cards, that means to me we are working in the PCMCIA v2.0 spec, which is 32-bit to the best of my knowledge.


I think you're right, but I don't believe the PCI bus itself came to this form factor until CardBus, and 32-bit PCMCIA/PC Cards prior to that were just widened versions of the older 16-bit standard. In addition to that, a lot of the microprocessors used in HPCs, at least on the MIPS side with the likes of the NEC VR4100 family, were strictly ISA systems with no PCI controller available even as an option. I would assume a similar situation existed in the SH7700 and StrongARM families.

I don't think you'll have any issues at all with finding UARTs, though, it was just something I noticed about that particular model you mentioned that made it look like it might give you a little more of a challenge if you went with it.

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astrosynthesist - 2020-01-14 9:15 PM

I am a specialist in analog circuits, and digital circuit design is somewhat out of my domain... but I have a working knowledge and I am hoping that < 500 MHz bus speeds will be not too insane for me to dip my toes into. It will be a learning process!


That's great, definitely keep us updated if you find time to give it all a try! Sounds like you've got some great ideas for whichever path you choose and I wish you luck on getting something working.
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astrosynthesist Page Icon Posted 2020-01-14 11:31 PM
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ict - 2020-01-15 5:30 PM

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astrosynthesist - 2020-01-14 9:15 PM

Seeing as the Casio A10/A11 is a first-generation unit, and it supports modem cards, that means to me we are working in the PCMCIA v2.0 spec, which is 32-bit to the best of my knowledge.


I think you're right, but I don't believe the PCI bus itself came to this form factor until CardBus, and 32-bit PCMCIA/PC Cards prior to that were just widened versions of the older 16-bit standard. In addition to that, a lot of the microprocessors used in HPCs, at least on the MIPS side with the likes of the NEC VR4100 family, were strictly ISA systems with no PCI controller available even as an option. I would assume a similar situation existed in the SH7700 and StrongARM families.


Holy crap what a brain fart! You are absolutely right! What was I thinking?

I will keep this in mind and try to find another approach... this may be a good thing, maybe I might find a smarter approach than the UART idea that will give more bandwidth. Will have to look into that spec.


Quote
ict - 2020-01-15 5:30 PM
That's great, definitely keep us updated if you find time to give it all a try! Sounds like you've got some great ideas for whichever path you choose and I wish you luck on getting something working.


Thank you for your interest, input, and encouragement! It's already done a lot to ensure I can get this off the ground.
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